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| ICS8714004I Datasheet, PDF (12/31 Pages) Integrated Device Technology – Output frequency range | |||
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ICS8714004I Data Sheet
FemtoCLock® Zero Delay Buffer/Clock Generator for PCI Express⢠and Ethernet
Parameter Measurement Information
3.3V±5%
3.3V±5%
VDD
VDDA
IREF
GND
Measurement
Point
2pF
Measurement
Point
2pF
3.3V±5%
3.3V±5%
VDD
VDDA
0V 0V
This load condition is used for VMAX, VMIN, VRB, tSTABLE, VCROSS,
ïVCROSS and Rise/Fall Edge Rate measurements.
3.3V HCSL Output Load Test Circuit
This load condition is used for IDD, tjit(cc), tjit(Ã) and tsk(o)
measurements.
3.3V HCSL Output Load Test Circuit
3.3V±5%
POWER SUPPLY
+ Float GND â
VDD
VDDA
SCOPE
Qx
nQx
VDD
nCLK
V
PP
CLK
GND
Cross Points
V
CMR
3.3V M-LVDS Output Load Test Circuit
Differential Input Level
nQ0:Q3,
nQx
nFBOUT
Qx
Q0:Q3,
FBOUT
nQy
tcycle n
tcycle n+1
| | tjit(cc) = tcycle n â tcycle n+1
Qy
1000 Cycles
Output Skew
ICS8714004DKI REVISION A MARCH 24, 2014
Cycle-to-Cycle Jitter
12
©2014 Integrated Device Technology, Inc.
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