ICS932S431A Datasheet, PDF (21/22 Pages) Integrated Device Technology – Low drift PCIe clocks for Non-Transparent Bridging

Integrated
Circuit
Systems, Inc.
ICS932S431A
Datasheet
N
INDEX
AREA
12
D
A2
e
b
c
E1 E
A
A1
-C-
SEATING
PLANE
aaa C
L
a
6.10 mm. Body, 0.50 mm. Pitch TSSOP
(240 mil)
(20 mil)
In Millimeters
In Inches
SYMBOL COMMON DIMENSIONS COMMON DIMENSIONS
MIN
MAX
MIN
MAX
A
--
1.20
--
.047
A1
0.05
0.15
.002
.006
A2
0.80
1.05
.032
.041
b
0.17
0.27
.007
.011
c
0.09
0.20
.0035
.008
D
SEE VARIATIONS
SEE VARIATIONS
E
8.10 BASIC
0.319 BASIC
E1
6.00
6.20
.236
.244
e
0.50 BASIC
0.020 BASIC
L
0.45
0.75
.018
.030
N
SEE VARIATIONS
SEE VARIATIONS
α
0°
8°
0°
8°
aaa
--
0.10
--
.004
VARIATIONS
N
D mm.
MIN
MAX
56
13.90
14.10
Reference Doc.: JEDEC Publication 95, MO-153
10-0039
D (inch)
MIN
MAX
.547
.555
Ordering Information
Part / Order Number
932S431AGLF
932S431AGLFT
Shipping Packaging
Tubes
Tape and Reel
Package
56-pin TSSOP
56-pin TSSOP
Temperature
0 to +70°C
0 to +70°C
"LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
"A" denotes the revision designator (will not correlate to datasheet revision).
1426A—11/12/09
21