ICS932S431A Datasheet, PDF (17/22 Pages) Integrated Device Technology – Low drift PCIe clocks for Non-Transparent Bridging

Integrated
Circuit
Systems, Inc.
ICS932S431A
Datasheet
SMBus Table: CPU Programmable Output Divider Register
Byte 19
Pin #
Name
Control Function
Bit 7
-
CPUDiv3
Bit 6
-
Bit 5
-
CPUDiv2
CPUDiv1
CPU Divider Ratio
Programming Bits
Bit 4
-
CPUDiv0
Bit 3
RESERVED
Bit 2
RESERVED
Bit 1
RESERVED
Bit 0
RESERVED
Type
RW
RW
RW
RW
0
1
See CPU, SRC and PCI
Divider Ratios Table
PWD
X
X
X
X
X
X
X
X
SMBus Table: SRC and PCI Programmable Output Divider Register
Byte 20
Pin #
Name
Control Function
Bit 7
-
PCIDiv3
Bit 6
-
Bit 5
-
PCIDiv2
PCIDiv1
PCI Divider Ratio
Programming Bits
Bit 4
-
PCIDiv0
Bit 3
-
SRC_Div3
Bit 2
-
Bit 1
-
SRC_Div2
SRC_Div1
SRC_ Divider Ratio
Programming Bits
Bit 0
-
SRC_Div0
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
See CPU, SRC and PCI
Divider Ratios Table
See CPU, SRC and PCI
Divider Ratios Table
PWD
X
X
X
X
X
X
X
X
SMBusTable: Test Byte Register
Byte 21
Test
Bit 7
`
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Test Function
ICS ONLY TEST
ICS ONLY TEST
ICS ONLY TEST
ICS ONLY TEST
ICS ONLY TEST
ICS ONLY TEST
ICS ONLY TEST
ICS ONLY TEST
Note: Do NOT write to Bit 21. Erratic device operation will result!
Type
RW
RW
RW
RW
RW
RW
RW
RW
Test Result
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PWD
0
0
0
0
0
0
0
0
1426A—11/12/09
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