ICS87974I Datasheet, PDF (2/16 Pages) Integrated Device Technology – Fully integrated PLL

BLOCK DIAGRAM
SELA ^{(Internal Pulldown)}
CLK_SEL ^{(Internal Pulldown)}
CLK0 ^{(Internal Pulldown)} ₀
CLK1 ^{(Internal Pullup)}
1
FB_IN ^{(Internal Pullup)}
PLL_SEL ^{(Internal Pullup)}
VCO_SEL ^{(Internal Pulldown)}
SELB ^{(Internal Pulldown)}
PLL
SELC ^{(Internal Pulldown)}
nMR/OE ^{(Internal Pullup)}
FB_SEL1 ^{(Internal Pulldown)}
FB_SEL0 ^{(Internal Pulldown)}
CLK_EN ^{(Internal Pullup)}
ICS87974I
LOW SKEW, 1-TO-15,
LVCMOS/LVTTL CLOCK GENERATOR
0
÷2
0
÷2
1
÷4
1
÷4
÷6
0
DQ ⁵
1
0
DQ ⁵
1
0
DQ ⁴
1
QA0:QA4
QB0:QB4
QC0:QC3
0
0
DQ
QFB
1
1
÷2
87974CYI
www.idt.com
2
REV. E JULY 26, 2010