ICS841664I Datasheet, PDF (2/16 Pages) Integrated Device Technology – FEMTOCLOCK™ CRYSTAL-TO-HCSL CLOCK GENERATOR

ICS841664I
FEMTOCLOCK™ CRYSTAL-TO-HCSL CLOCK GENERATOR
PRELIMINARY
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 18
2
V_DD
Power
REF_OUT Output
Core supply pins.
LVCMOS/LVTTL reference frequency clock output.
3, 7, 15, 22
GND
Power
4, 5,
8, 9
QA0, nQA0,
QA1, nQA1
Ouput
Power supply ground.
Differential Bank A output pairs. HCSL interface levels.
6
V_DDOA
Power
Output supply pin for Bank A outputs.
10
nREF_OE Input
Pullup
Active low REF_OUT enable/disable. See Table 3E.
LVCMOS/LVTTL interface levels.
11
BYPASS
Input
Pulldown
Selects PLL operation/PLL bypass operation.
See Table 3C. LVCMOS/LVTTL interface levels.
12
REF_IN Input Pulldown LVCMOS/LVTTL PLL reference clock input.
13
REF_SEL
Input
Pulldown
Reference select. Selects the input reference source.
See Table 3B. LVCMOS/LVTTL interface levels.
14
16, 17
19
20, 21
24, 25
V_DDA
XTAL_OUT,
XTAL_IN
MR/nOE
nQB1, QB1
nQB0, QB0
Power
Input
Input
Output
Pulldown
Analog supply pin.
Parallel resonant crystal interface. XTAL_OUT is the output,
XTAL_IN is the input. (PLL reference.)
Active HIGH master reset. Active LOW output enable. When logic HIGH,
the internal dividers are reset and the outputs are in high impedance
(HiZ). When logic LOW, the internal dividers and the outputs are enabled.
See Table 3D. LVCMOS/LVTTL interface levels.
Differential Bank B output pairs. HCSL interface levels.
23
26, 27
V_DDOB
FSEL1,
FSEL0
Power
Output supply pin for Bank B outputs.
Input Pulldown Output frequency select pins. LVCMOS/LVTTL interface levels.
28
IREF
Output
HCSL current reference resistor output. A fixed precision resistor (475Ω)
from this pin to ground provides a reference current used for differential
current-mode QXx/nQXx clock outputs.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C
IN
C_PD
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Power Dissipation
Capacitance
Input PullupResistor
Input Pulldown Resistor
Test Conditions
V_DD, V_DDOA, V_DDOB = 3.465V
Minimum
Typical
4
18
51
51
Maximum Units
pF
pF
kΩ
kΩ
IDT^™ / ICS^™ HCSL CLOCK GENERATOR
2
ICS841664AGI REV. A JANUARY 30, 2009