ICS841664I Datasheet, PDF (12/16 Pages) Integrated Device Technology – FEMTOCLOCK™ CRYSTAL-TO-HCSL CLOCK GENERATOR

ICS841664I
FEMTOCLOCK™ CRYSTAL-TO-HCSL CLOCK GENERATOR
POWER CONSIDERATIONS
PRELIMINARY
This section provides information on power dissipation and junction temperature for the ICS841664I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS841664I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V = 3.3V + 5% = 3.465V, which gives worst case results.
DD
Core and HCSL Output Power Dissipation
• Power (core) = V * (I + I ) = 3.465V * (70mA + 15mA) = 294.5mW
MAX
DD_MAX
DD
DDA
• Power (outputs) = 44.5mW/Loaded Output pair
MAX
If all outputs are loaded, the total power is 4 * 44.5mW = 178mW
LVCMOS Output Power Dissipation
• Dynamic Power Dissipation at 25MHz
Power (25MHz) = C_PD * Frequency * (V_DD)² = 18pF * 25MHz * (3.465V)² = 5.40mW per output
Total Power Dissipation
• Total Power
= Power (core) + Power (Outputs) + Total Power (25MHz)
= 294.5mW + 178mW + 5.4mW
= 477.9mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS^TM devices is 125°C.
The equation for Tj is as follows:
Tj
=
θ_JA
*
Pd_total
+
T
A
Tj = Junction Temperature
θ_JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in Section 1 above)
T_A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ_JA must be used. Assuming no air
flow and a multi-layer board, the appropriate value is 64.5°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.478W * 64.5°C/W = 115.8°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (multi-layer).
TABLE 7. THERMAL RESISTANCE θ FOR 28-LEAD TSSOP, FORCED CONVECTION
JA
θ by Velocity (Meters per Second)
JA
Multi-Layer PCB, JEDEC Standard Test Boards
0
64.5°C/W
1
60.4°C/W
2.5
58.5°C/W
IDT^™ / ICS^™ HCSL CLOCK GENERATOR
12
ICS841664AGI REV. A JANUARY 30, 2009