ICS841664I Datasheet, PDF (11/16 Pages) Integrated Device Technology – FEMTOCLOCK™ CRYSTAL-TO-HCSL CLOCK GENERATOR

ICS841664I
FEMTOCLOCK™ CRYSTAL-TO-HCSL CLOCK GENERATOR
PRELIMINARY
SCHEMATIC EXAMPLE
Figure 5 shows an example of ICS841664I application schematic.
In this example, the device is operated at V_CC = 3.3V. The 18pF
parallel resonant 25MHz crystal is used. The C1 = 27pF and C2
= 27pF are recommended for frequency accuracy. For different
board layout, the C1 and C2 may be slightly adjusted for optimizing
frequency accuracy. One example of HCSL and one example of
LVCMOS terminations are shown in this schematic. The
decoupling capacitors should be located as close as possible to
the power pin.
FIGURE 5. ICS841664I SCHEMATIC LAYOUT
IDT^™ / ICS^™ HCSL CLOCK GENERATOR
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ICS841664AGI REV. A JANUARY 30, 2009