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| ICS870S208 Datasheet, PDF (16/20 Pages) Integrated Device Technology – Glitchless output behavior during input switch | |||
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ICS870S208 Data Sheet
DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS870S208.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS870S208 is the sum of the core power plus the analog power plus the power dissipated due to into the
load. The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.
⢠Power (core)MAX = VDD_MAX * IDD = 3.465V *80mA = 277.2mW
⢠Output Impedance ROUT Power Dissipation due to Loading 50ï to VDD/2
Output Current IOUT = VDD_MAX / [2 * (50ï + ROUT)] = 3.465V / [2 * (50ï + 15ï)] = 26.7mA
⢠Power Dissipation on the ROUT per LVCMOS output
Power (ROUT) = ROUT * (IOUT)2 = 15ï * (26.7mA)2 = 10.69mW per output
⢠Total Power (ROUT) = 10.69mW * 8 = 85.52mW
Dynamic Power Dissipation at 250MHz
Power (250MHz) = CPD * Frequency * (VDD)2 = 8pF * 250MHz * (3.465V)2 = 24mW per output
Total Power (250MHz) = 24mW * 8 = 192mW
Total Power Dissipation
⢠Total Power
= Power (core)MAX + Power (ROUT) + Power (250MHz)
= 277.2mW + 85.52mW + 192mW
= 554.72mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj = ï±JA * Pd_total + TA
Tj = Junction Temperature
ï±JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ï±JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 42.7°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.555W *42.7°C/W = 93.7°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance ï±JA for 32 Lead VFQFN, Forced Convection
ï±JA by Velocity
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
42.7°C/W
1
37.3°C/W
2.5
33.5°C/W
ICS870S208BKLF REVISION A APRIL 3, 2013
16
©2013 Integrated Device Technology, Inc.
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