ICS870S208 Datasheet, PDF (14/20 Pages) Integrated Device Technology – Glitchless output behavior during input switch

ICS870S208 Data Sheet
DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH
Differential Clock Input Interface
The CLKx /nCLKx accepts LVDS, LVPECL, LVHSTL, HCSL and
other differential signals. Both signals must meet the V_PP and V_CMR
input requirements. Figures 3A to 3E show interface examples for the
CLKx/nCLKx input driven by the most common driver types. The
input interfaces suggested here are examples only. Please consult
with the vendor of the driver component to confirm the driver
termination requirements. For example, in Figure 3A, the input
termination applies for IDT open emitter LVHSTL drivers. If you are
using an LVHSTL driver from another vendor, use their termination
recommendation.
1.8V
Zo = 50Ω
Zo = 50Ω
LVHSTL
IDT
LVHSTL Driver
3.3V
CLK
R1
R2
50Ω
50Ω
nCLK
Differential
Input
Figure 3A. CLK/nCLK Input Driven by an
IDT Open Emitter LVHSTL Driver
3.3V
LVPECL
Zo = 50Ω
Zo = 50Ω
3.3V
CLK
R1
R2
50Ω
50Ω
nCLK
Differential
Input
R2
50Ω
Figure 3B. CLK/nCLK Input Driven by a
3.3V LVPECL Driver
3.3V
LVPECL
3.3V
3.3V
CLK
nCLK
Differential
Input
3.3V
LVDS
Zo = 50Ω
Zo = 50Ω
3.3V
R1
100Ω
CLK
nCLK
Receiver
Figure 3C. CLK/nCLK Input Driven by a
3.3V LVPECL Driver
3.3V
*R3
*R4
HCSL
3.3V
CLK
nCLK
Differential
Input
Figure 3D. CLK/nCLK Input Driven by a
3.3V LVDS Driver
Figure 3E. CLK/nCLK Input Driven by a
3.3V HCSL Driver
ICS870S208BKLF REVISION A APRIL 3, 2013
14
©2013 Integrated Device Technology, Inc.