ICS9UMS9610CKLFT Datasheet, PDF (15/20 Pages) Integrated Device Technology – PC MAIN CLOCK

ICS9UMS9610
PC MAIN CLOCK
Advance Information
Byte
Bit(s)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
16 M/N Enable Register
Pin #
Name
MN Enable
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Control Function
Enables PLL MN programming
Type
0
RW MN Disabled
1
MN Enabled
Default
0
0
0
0
0
0
0
0
Byte
Bit(s)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
17 CPU PLL Spread Spectrum Index Register
Pin #
Name
Control Function
CPUSSP7
CPUSSP6
CPUSSP5
CPUSSP4
Spread Spectrum Programming bit(7:0)
CPUSSP3
Contact IDT before editing these values.
CPUSSP2
CPUSSP1
CPUSSP0
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
These Spread Spectrum bits in
Byte 17 and 18 will program the
spread percentage of the CPU
and SRC outputs
Default
X
X
X
X
X
X
X
X
Byte
Bit(s)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
18 CPU PLL Spread Spectrum Index Register
Pin #
Name
Control Function
CPUSSP15
CPUSSP14
CPUSSP13
CPUSSP12
Spread Spectrum Programming bit(15:8)
CPUSSP11
Contact IDT before editing these values.
CPUSSP10
CPUSSP9
CPUSSP8
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
These Spread Spectrum bits in
Byte 17 and 18 will program the
spread percentage of the CPU
and SRC outputs
Default
X
X
X
X
X
X
X
X
Byte
Bit(s)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
19 LCD100 PLL Spread Spectrum Index Register
Pin #
Name
Control Function
LCDSSP7
LCDSSP6
LCDSSP5
LCDSSP4
Spread Spectrum Programming bit(7:0)
LCDSSP3
Contact IDT before editing these values.
LCDSSP2
LCDSSP1
LCDSSP0
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
These Spread Spectrum bits in
Byte 19 and 20 will program the
spread percentage of the CPU
and SRC outputs
Default
X
X
X
X
X
X
X
X
IDT^TM/ICST^M PC MAIN CLOCK
15
1336—07/21/08