ICS854S006I Datasheet, PDF (12/15 Pages) Integrated Device Technology – Low Skew, 1-to-6, Differential-to - LVDS Fanout Buffer One differential clock input pair

ICS854S006I Data Sheet
LOW SKEW, 1-TO-6, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
RELIABILITY INFORMATION
TABLE 7. θ VS. AIR FLOW TABLE FOR 24 LEAD TSSOP
JA
θ by Velocity (Meters per Second)
JA
Multi-Layer PCB, JEDEC Standard Test Boards
0
70°C/W
1
65°C/W
TRANSISTOR COUNT
The transistor count for ICS854S006I is: 293
2.5
62°C/W
PACKAGE OUTLINE & DIMENSIONS
PACKAGE OUTLINE - G SUFFIX FOR 24 LEAD TSSOP
TABLE 8. PACKAGE DIMENSIONS
SYMBOL
Millimeters
Minimum
Maximum
N
24
A
--
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
7.70
7.90
E
6.40 BASIC
E1
4.30
4.50
e
0.65 BASIC
L
0.45
0.75
α
0°
8°
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
ICS854S006AGI REVISION B JANUARY 18, 2010
12
©2010 Integrated Device Technology, Inc.