ICS8536AG Datasheet, PDF (12/21 Pages) Integrated Device Technology – Low Skew, 1-to-6, Crystal LVCMOS Differential-to-3.3V, 2.5V LVPECL Fanout Buffer

ICS8536-01 Data Sheet
CRYSTAL/LVCMOS/DIFFERENTIAL-TO-LVPECL FANOUT BUFFER
DIFFERENTIAL CLOCK INPUT INTERFACE
The CLK, nCLK accepts LVDS, LVPECL, LVHSTL, SSTL,
HCSL and other differential signals. Both V and V must
SWING
OH
meet the V and V input requirements. Figures 4A to 4F
PP
CMR
show interface examples for the CLK, nCLK input driven by
the most common driver types. The input interfaces suggested
here are examples only. Please consult with the vendor of the
1.8V
Zo = 50 Ohm
Zo = 50 Ohm
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V
CLK
nCLK _HiPerClockS
Input
R1
R2
50
50
FIGURE 4A. CLK, nCLK INPUT
DRIVEN BY AN IDT OPEN EMITTER
LVHSTL DRIVER
3.3V
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
3.3V
R3
R4
125
125
3.3V
CLK
nCLK _HiPerClockS
Input
R1
R2
84
84
driver component to confirm the driver termination
requirements. For example in Figure 4A, the input termination
applies for IDT open emitter LVHSTL drivers. If you are using
an LVHSTL driver from another vendor, use their termination
recommendation.
3.3V
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
3.3V
CLK
nCLK _HiPerClockS
Input
R1
R2
50
50
R3
50
FIGURE 4B. CLK, nCLK INPUT
DRIVEN BY A 3.3V LVPECL DRIVER
3.3V
Zo = 50 Ohm
LVDS_Driv er
R1
100
Zo = 50 Ohm
3.3V
CLK
nCLK _{Receiv er}
FIGURE 4C. CLK, nCLK INPUT
DRIVEN BY A 3.3V LVPECL DRIVER
FIGURE 4D. CLK, nCLK INPUT
DRIVEN BY A 3.3V LVDS DRIVER
2.5V
*R3 33
Zo = 50Ω
Zo = 50Ω
*R4 33
HCSL
R1
50
*Optional – R3 and R4 can be 0Ω
3.3V
CLK
nCLK
HiPerClockS
R2
Input
50
FIGURE 4E. CLK, nCLK INPUT
DRIVEN BY A 3.3V HCSL DRIVER
2.5V
SSTL
Zo = 60Ω
Zo = 60Ω
2.5V
R3
R4
120
120
3.3V
CLK
R1
R2
120
120
nCLK
HiPerClockS
FIGURE 4F. CLK, nCLK INPUT
DRIVEN BY A 2.5V SSTL DRIVER
ICS8536AG-01 REVISION B AUGUST 17, 2012
12
©2012 Integrated Device Technology, Inc.