ICS8N3PG10MBKI-062 Datasheet, PDF (11/20 Pages) Integrated Device Technology – One differential LVPECL output pair

ICS8N3PG10MBKI-062 DATA SHEET
2.5V Differential Clock Input Interface
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, HCSL and other
differential signals. Both V_SWING and V_OH must meet the V_PP and
V_CMR input requirements. Figure 3A to Figure 3E show interface
examples for the CLK/nCLK input driven by the most common driver
types. The input interfaces suggested here are examples only.
Please consult with the vendor of the driver component to confirm the
driver termination requirements. For example, in Figure 3A, the input
termination applies for IDT open emitter LVHSTL drivers. If you are
using an LVHSTL driver from another vendor, use their termination
recommendation.
1.8V
Zo = 50
Zo = 50
LVHSTL
IDT Open Emitter
LVHSTL Driver
2.5V
CLK
R1
R2
50
50
nCLK
Differential
Input
Figure 3A. CLK/nCLK Input Driven by an
IDT Open Emitter LVHSTL Driver
2.5V
LVPECL
Zo = 50
Zo = 50
2.5V
CLK
R1
R2
50
50
nCLK
Differential
Input
R3
18
Figure 3D. CLK/nCLK Input Driven by a
2.5V LVPECL Driver
2.5V
LVPECL
Zo = 50
Zo = 50
2.5V
R3
250
R4
250
2.5V
CLK
R1
62.5
R2
62.5
nCLK
Differential
Input
2.5V
2.5V
*R3 33
Zo = 50
Zo = 50
*R4 33
HCSL
R1
50
*Optional – R3 and R4 can be 0
CLK
nCLK
R2
50
Differential
Input
Figure 3B. CLK/nCLK Input Driven by a
2.5V LVPECL Driver
Figure 3E. CLK/nCLK Input Driven by a
2.5V HCSL Driver
2.5V
LVDS
Zo = 50
Zo = 50
2.5V
R1
100
CLK
nCLK
Differential
Input
Figure 3C. CLK/nCLK Input Driven by a 2.5V LVDS Driver
REV A 05/15/14
11
PROGRAMMABLE FEMTOCLOCK^® NG DIFFERENTIAL-TO-3.3V, 2.5V
LVPECL SYNTHESIZER