ICS8N3PG10MBKI-062 Datasheet, PDF (1/20 Pages) Integrated Device Technology – One differential LVPECL output pair

Programmable FemtoClock^® NG
Differential-to-3.3V, 2.5V LVPECL
Synthesizer
ICS8N3PG10MBKI-062
DATA SHEET
General Description
The ICS8N3PG10MBKI-062 is a very versatile programmable
LVPECL synthesizer that can be used for OTN/SONET to Ethernet
or 10 GB Ethernet to OTN/SONET rate conversions. The conversion
rate is pin-selectable and one of the four rates is supported at a time.
In the default configuration, an input clock of 100MHz is converted to
311.04MHz output.
The device uses IDT’s fourth generation FemtoClock NG technology
to deliver low phase noise clocks combined with low power
consumption.
Features
• Fourth Generation FemtoClock^® Next Generation (NG)
technology
• Footprint compatible with 5mm x 7mm differential oscillators
• One differential LVPECL output pair
• CLK, nCLK input pair can accept the following levels: HCSL,
LVDS, LVPECL and LVHSTL
• Output frequencies: 150MHz, 125MHz, 155.52MHz and
311.04MHz
• RMS phase jitter, 12kHz – 20MHz: 0.295ps (typical) @ 3.3V
• Full 3.3V or 2.5V operating supply
• -40°C to 85°C ambient operating temperature
• Lead-free (RoHS 6) packaging
Table 1. Frequency Select Table
FSEL[1:0]
Input (MHz)
Output Frequency (MHz)
00
200
150
01
100
125
10
100
155.52
11
100
311.04 (default)
Block Diagram
Pin Assignment
10
OE 1
9
8 VCC
Reserved 2
7 nQ
VEE 3 ₄
56Q
ICS8N3PG10MBKI-062
10-Lead VFQFN
5mm x 7mm x 1mm package body
K Package
Top View
Q
CLK ^Pulldown
nCLK ^{Pullup/Pulldown}
Pre-divider
Phase
FemtoClock VCO
÷N
Detector
nQ
÷M
2
FSEL[1:0] ^Pullup
OE ^Pullup
ICS8N3PG10MBKI-062 REV A 05/15/14
1
©2014 Integrated Device Technology, Inc.