ICS843207-350 Datasheet, PDF (11/16 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-LVPECL 350MHZ FREQUENCY MARGINING SYNTHESIZER

ICS843207-350
FEMTOCLOCKS™ CRYSTAL-TO-LVPECL 350MHZ FREQUENCY MARGINING SYNTHESIZER
POWER CONSIDERATIONS
PRELIMINARY
This section provides information on power dissipation and junction temperature for the ICS843207-350.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843207-350 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V = 3.3V + 5% = 3.465V, which gives worst case results.
CC
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core) = V * I = 3.465V * 210mA = 727.65mW
MAX
CC_MAX
EE_MAX
• Power (outputs) = 30mW/Loaded Output pair
MAX
If all outputs are loaded, the total power is 7 * 30mW = 210mW
Total Power (3.63V, with all outputs switching) = 727.65mW + 210mW = 937.65mW
_MAX
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS^TM devices is 125°C.
The equation for Tj is as follows:
Tj
=
θ_JA
*
Pd_total
+
T
A
Tj = Junction Temperature
θ_JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T = Ambient Temperature
A
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ_JA must be used. Assuming air
flow at 1 meter per second and a multi-layer board, the appropriate value is 55.9°C/W per Table 8 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.938W *55.9°C/W = 122.4°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and
the type of board (single layer or multi-layer).
TABLE 8. THERMAL RESISTANCE θ FOR 48-PIN LQFP, FORCED CONVECTION
JA
θ by Velocity (Meters per Second)
JA
Multi-Layer PCB, JEDEC Standard Test Boards
0
65.7°C/W
1
55.9°C/W
2.5
52.4°C/W
IDT^™ / ICS^™ LVPECL FREQUENCY MARGINING SYNTHESIZER
11
ICS843207CY-350 REV. A DECEMBER 3, 2007