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ICS874001AGI-05LF Datasheet, PDF (10/18 Pages) Integrated Device Technology – PCI Express™ Jitter Attenuator | |||
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ICS74001I-05 Data Sheet
PCI EXPRESS⢠JITTER ATTENUATOR
Differential Clock Input Interface
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and
other differential signals. Both signals must meet the VPP and VCMR
input requirements. Figures 2A to 2F show interface examples for the
CLK/nCLK input driven by the most common driver types. The input
interfaces suggested here are examples only. Please consult with the
vendor of the driver component to confirm the driver termination
requirements. For example, in Figure 2A, the input termination
applies for IDT open emitter LVHSTL drivers. If you are using an
LVHSTL driver from another vendor, use their termination
recommendation.
1.8V
Zo = 50â¦
Zo = 50â¦
LVHSTL
IDT
LVHSTL Driver
3.3V
CLK
R1
R2
50â¦
50â¦
nCLK
Differential
Input
2A. CLK/nCLK Input Driven by an IDT
Open Emitter LVHSTL Driver
3.3V
LVPECL
Zo = 50â¦
Zo = 50â¦
3.3V
R3
125â¦
R4
125â¦
3.3V
CLK
nCLK
Differential
R1
R2
84â¦
84â¦
Input
3.3V
LVPECL
Zo = 50â¦
Zo = 50â¦
3.3V
CLK
R1
R2
50â¦
50â¦
nCLK
Differential
Input
R2
50â¦
Figure 2B. CLK/nCLK Input
Driven by a 3.3V LVPECL Driver
3.3V
LVDS
Zo = 50â¦
Zo = 50â¦
3.3V
R1
100â¦
CLK
nCLK
Receiver
Figure 2C. CLK/nCLK Input
Driven by a 3.3V LVPECL Driver
3.3V
3.3V
*R3 33â¦
Zo = 50â¦
Zo = 50â¦
*R4 33â¦
HCSL
R1
50â¦
*Optional â R3 and R4 can be 0â¦
CLK
nCLK
R2
50â¦
Differential
Input
Figure 2E. CLK/nCLK Input
Driven by a 3.3V HCSL Driver
Figure 2D. CLK/nCLK Input
Driven by a 3.3V LVDS Driver
2.5V
SSTL
Zo = 60â¦
Zo = 60â¦
2.5V
R3
120â¦
R4
120â¦
3.3V
CLK
R1
120â¦
R2
120â¦
nCLK
Differential
Input
Figure 2F. CLK/nCLK Input
Driven by a 2.5V SSTL Driver
ICS874001AGI-05 REVISION A JANUARY 14, 2011
10
©2011 Integrated Device Technology, Inc.
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