ICS874001AGI-05LF Datasheet, PDF (1/18 Pages) Integrated Device Technology – PCI Express™ Jitter Attenuator

PCI Express™ Jitter Attenuator
ICS874001I-05
DATA SHEET
General Description
The ICS874001I-05 is a high performance Jitter Attenuator designed
for use in PCI Express™ systems. In some PCI Express systems,
such as those found in desktop PCs, the PCI Express clocks are
generated from a low bandwidth, high phase noise PLL frequency
synthesizer. In these systems, a jitter attenuator may be required to
attenuate high frequency random and deterministic jitter
components from the PLL synthesizer and from the system board.
The ICS874001I-05 has a bandwidth of 6MHz with <1dB peaking,
easily meeting PCI Express Gen2 PLL requirements.
The ICS874001I-05 uses IDT’s 3^RD Generation FemtoClock^®
PLL technology to achieve the lowest possible phase noise. The
device is packaged in a small 20-pin TSSOP package, making it
ideal for use in space constrained applications such as PCI Express
add-in cards.
Features
• One differential LVDS output pair
• One differential clock input
• CLK, nCLK supports the following input levels: LVPECL, LVDS,
LVHSTL, SSTL, HCSL
• Input frequency range: 98MHz to 128MHz
• Output frequency range: 98MHz to 640MHz
• VCO range: 490MHz - 640MHz
• Cycle-to-cycle jitter: 50ps (maximum)
• Full 3.3V operating supply
• PCI Express (2.5Gb/s) and Gen 2 (5 Gb/s) jitter compliant
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package
Block Diagram
PLL_SEL ^Pullup
CLK ^Pulldown
nCLK ^Pullup
Phase
Detector
Pin Assignment
PLL_SEL 1
nc 2
nc 3
nc 4
MR 5
nc 6
F_SEL1 7
VDDA 8
F_SEL0 9
VDD 10
20 nc
19 VDDO
18 Q
17 nQ
16 nc
15 nc
14 GND
13 nCLK
12 CLK
11 OE
ICS874001I-05
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm
package body
G Package
Top View
0
Output Divider
Q
0 0 ÷5
0 1 ÷4
nQ
VCO
490 - 640MHz
1
1 0 ÷2 (default)
1 1 ÷1
Internal Feedback
÷5
MR ^Pulldown
F_SEL[1:0] ^{Pullup/Pulldown}
2
OE ^Pullup
ICS874001AGI-05 REVISION A JANUARY 14, 2011
1
©2011 Integrated Device Technology, Inc.