ICS843002I-41 Datasheet, PDF (9/21 Pages) Integrated Circuit Systems – 700MHz, FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843002I-41
700MHZ, FEMTOCLOCKS™ VCXO BASED
SONET/SDH JITTER ATTENUATOR
PARAMETER MEASUREMENT INFORMATION
2V
V_CC,
V_CCA,
V_{CCO_LVPECL}
LVPECL
V_EE
SCOPE
Qx
nQx
2.8V±0.04V
2V
V_CC,
V_CCA
V_{CCO_LVPECL}
LVPECL
V_EE
SCOPE
Qx
nQx
-1.3V ± 0.165V
-0.5V ± 0.125V
3.3V CORE/3.3V LVPECL OUTPUT LOAD AC TEST CIRCUIT 3.3V CORE/2.5V LVPECL OUTPUT LOAD AC TEST CIRCUIT
V_CC
nCLK0,
nCLK1
V
PP
nCLK0,
nCLK1
V
EE
Cross Points
V
CMR
Phase Noise Plot
Phase Noise Mask
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
DIFFERENTIAL INPUT LEVEL
nQx
Qx
nQy
Qy
t sk(o)
OUTPUT SKEW
PHASE JITTER
nQA, nQB
QA, QB
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/tPERIOD
80%
Clock _20%
Outputs
t_R
OUTPUT RISE/FALL TIME
843002AKI-41
80%
t_F
V_{SW I N G}
20%
www.icst.com/products/hiperclocks.html
9
REV. A JUNE 1, 2005