ICSSSTV16857 Datasheet, PDF (8/8 Pages) Integrated Circuit Systems – DDR 14-Bit Registered Buffer

ICSSSTV16857
N
INDEX
AREA
12
D
A2
e
b
c
E1 E
A
A1
-C-
SEATING
PLANE
aaa C
L
α
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
N
α
aaa
In Millimeters
COMMON DIMENSIONS
MIN
MAX
--
1.20
0.05
0.15
0.80
1.05
0.13
0.23
0.09
0.20
SEE VARIATIONS
6.40 BASIC
4.30
4.50
0.40 BASIC
0.45
0.75
SEE VARIATIONS
0°
8°
--
0.08
In Inches
COMMON DIMENSIONS
MIN
MAX
--
.047
.002
.006
.032
.041
.005
.009
.0035
.008
SEE VARIATIONS
0.252 BASIC
.169
.177
0.016 BASIC
.018
.030
SEE VARIATIONS
0°
8°
--
.003
VARIATIONS
N
D mm.
MIN
MAX
48
9.60
9.80
Reference Doc.: JEDEC Publication 95, MO-153
10-0037
D (inch)
MIN
MAX
.378
.386
4.40 mm. Body, 0.40 mm. pitch TSSOP
(173 mil)
(16 mil)
Ordering Information
ICSSSTV16857yL-T
Example:
ICS XXXX y L - PPP - T
Designation for tape and reel packaging
Pattern Number (2 or 3 digit number for parts with ROM code patterns)
Package Type
L=TSSOP (TVSOP)
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
Third party brands and names are the property of their respective owners.
ICS reserves the right to make changes in the device data identified in
8
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.