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ICSSSTV16857 Datasheet, PDF (4/8 Pages) Integrated Circuit Systems – DDR 14-Bit Registered Buffer
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ICSSSTV16857
Electrical Characteristics - DC
TA = 0 - 70º C; VDD = 2.5 V +/-200mV, VDDQ=2.5V 200mV; (unless otherwise stated)
SYMBOL PARAMETERS
CONDITIONS
VDD
MIN
VIK
VOH
VOL
II All Inputs
Standby (Static)
II = -18mA
IOH = -100µA
IOH= -16mA
IOL = 100µA
IOL = 16mA
VI = VDD or GND
RESET# = GND
IDD
VI = VIH (AC#) or VIL (AC),
Operating (Static)
Dynamic operating
clock only
RESET# = VDD
RESET = VDD, VI = VIH(AC)
or VIL (AC), CK and CK#
switching 50% duty cycle.
RESET# = VDD, VI = VIH(AC) IO = 0
IDDD
or VIL (AC), CK and CK#
Dynamic Operating switching 50% duty cycle.
per each data input One data input switching at
half clock frequency, 50%
duty cycle
rOH Output High
IOH = -20mA
rOL Output Low
[rOH - rOL] each
IOL = 20mA
rO(∆) separate bit
Data Inputs
Ci CK and CK#
IO = 20mA, TA = 25° C
VI = VREF ±310mV
VICR = 1.25V, VI(PP) = 360mV
Notes:
1 - Guaranteed by design, not 100% tested in production.
2.3V
2.3V-2.7
2.3V
2.3-2.7V
2.3V
2.7V
2.7V
2.3-2.7V
2.3-2.7V
2.5V
2.5V
VDD -0.2
1.95
7
7
2.5
2.5
TYP
2.5
2
0
0.16
15
10
MAX
-1.2
UNITS
0.2
V
0.35
±5
µA
0.01
µA
TBD
mA
TBD µA/clock MHz
TBD µA/ clock
MHz/data
20
Ω
20
Ω
4
Ω
3.5
3.5
pF
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