English
Language : 

ICSSSTV16857 Datasheet, PDF (3/8 Pages) Integrated Circuit Systems – DDR 14-Bit Registered Buffer
ICSSSTV16857
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 3.6V
Input Voltage1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to VDD +0.5
Output Voltage1,2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to VDDQ +0.5
Input Clamp Current . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Output Clamp Current . . . . . . . . . . . . . . . . . . . . . ±50mA
Continuous Output Current . . . . . . . . . . . . . . . . . ±50mA
VDD, VDDQ or GND Current/Pin . . . . . . . . . . . . ±100mA
Package Thermal Impedance3 . . . . . . . . . . . . . . . . . . . . 55°C/W
Notes:
1. The input and output negative voltage
ratings may be excluded if the input
and output clamp ratings are observed.
2. This current will flow only whtn the
output is in the high state level
V0 >VDDQ.
3. The package thermal impedance is
calculated in accordance with
JESD 51.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Recommended Operating Conditions
PAR AM ETER
DE SC R IPT ION
M IN
VDD
VDDQ
VREF
VTT
VI
VIH
VIH
VIL
VIL
VIH
VIL
VICR
VID
VIX
Supply Voltage
2 .3
I/O Supply Voltage
2 .3
Reference Voltage VREF = 0.5X VDDQ
Termination Voltage
Input Voltage
1 .1 5
VREF -0.04
0
DC Input High Voltage
AC Input High Voltage
DC Input Low Voltage
Data Inputs
VREF +0.15
VREF +0.31
AC Input Low Voltage
Input High Voltage Level
1 .7
RESET#
Input Low Voltage Level
Common mode Input Range
0 .9 7
CLK, CLK#
Differential Input Voltage
0 .3 6
Cross Point Voltage of Differential Clock
Pair
(VDDQ/2) -0.2
IOH
High-Level Output Current
IOL
Low-Level Output Current
TA
Operating Free-Air Temperature
0
1Guarenteed by design, not 100% tested in production.
TYP
2 .5
2 .5
1 .2 5
VREF
M AX
2 .7
2 .7
1 .3 5
VREF -0.04
VDD
UNITS
VREF -0.15
V
VREF -0.31
0 .7
1 .5 3
(VDDQ/ 2 )
+0 .2
-2 0
mA
20
70
°C
Third party brands and names are the property of their respective owners.
3