ICS951402 Datasheet, PDF (8/23 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for P4 processor

Integrated
Circuit
Systems, Inc.
ICS951402
Advance Information
I²C Table: Output Control Register
Byte 6 ^{Pin #}
Name
Control
Function
Bit 7
-
CPU_STOP# CPU Stop Status
Bit 6
-
PD#
PD# Status
Bit 5
-
PCI_F0
Free-run Control
Bit 4
-
PCI_F1
Free-run Control
Bit 3
Bit 2
Bit 1
Bit 0
-
-
40,39
44,43
CPUT/C_0
CPUT/C_1
CPUT/C_0
CPUT/C_1
Free-run Control
Free-run Control
Output Control
Output Control
Type
0
1
PWD
RW
See Table 1:
1
RW ^{Truth Table on page 3} 1
RW
Free Not free 0
RW
Free Not free 0
RW
Free Not free 1
RW
Free Not free 1
RW Disable Enable
1
RW Disable Enable
1
I²C Table: Output Control Register
Byte 7 ^{Pin #}
Name
Control
Function
Bit 7
15
Bit 6
14
Bit 5
23
Bit 4
22
Bit 3
21
Bit 2
20
Bit 1
17
Bit 0
16
PCICLK_F1
PCICLK_F0
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
PWD
1
1
1
1
1
1
1
1
I²C Table: Byte Count Register
Byte 8 ^{Pin # Name}
Control
Function
Type 0
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
BC7
RW
-
BC6
RW
-
BC5
BC4
Writing to this
register will configure
how many bytes will
RW
RW
-
-
BC3
be read back, default ^RW
-
BC2
is 0F = 15 bytes. ^RW
-
BC1
RW
-
BC0
RW
-
1
PWD
-
0
-
0
-
0
-
0
-
1
-
1
-
1
-
1
0660—05/05/05
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