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ICS950211 Datasheet, PDF (8/21 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for P4
Integrated
Circuit
Systems, Inc.
ICS950211
Byte 8: Byte Count Read Back Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Byte7
Byte6
Byte5
Byte4
Byte3
Byte2
Byte1
Byte0
PWD
0
0
0
0
1
1
1
1
Description
Note: Writing to this register will configure byte count and how
many bytes will be read back, default is 0FH = 15 bytes.
Byte 9: Watchdog Timer Count Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
WD7
WD6
WD5
WD4
WD3
WD2
WD1
WD0
PWD
0
0
0
0
1
0
0
0
Description
The decimal representation of these 8 bits correspond to X •
290ms the watchdog timer will wait before it goes to alarm mode
and reset the frequency to the safe setting. Default at power up is
8 • 290ms = 2.3 seconds.
Byte 10: Programming Enable bit 8 Watchdog Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Program
Enable
WD Enable
WD Alarm
SF4
SF3
SF2
SF1
SF0
PWD
0
0
0
0
0
0
0
0
Description
Programming Enable bit
0 = no programming. Frequencies are selected by HW latches or Byte0 1
= enable all I2C programing.
Watchdog Enable bit.
This bit will over write WDEN latched value. 0 = disable, 1 = Enable.
Watchdog Alarm Status 0 = normal 1= alarm status
Watchdog safe frequency bits. Writing to these bits will configure the safe
frequency corrsponding to Byte 0 Bit 2, 7:4 table
Byte 11: VCO Frequency M Divider (Reference divider) Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Ndiv 8
Mdiv 6
Mdiv 5
Mdiv 4
Mdiv 3
Mdiv 2
Mdiv 1
Mdiv 0
PWD
Description
X N divider bit 8
X
X
X The decimal respresentation of Mdiv (6:0) corresposd to the
X reference divider value. Default at power up is equal to the
X latched inputs selection.
X
X
0465E—05/17/05
8