ICS950211 Datasheet, PDF (17/21 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for P4

Integrated
Circuit
Systems, Inc.
ICS950211
Un-Buffered Mode 3V66 & PCI Phase Relationship
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there is no
defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66 by the standard
skew described below as Tpci.
3V66
Tpci
PCICLK_F and PCICLK
Group Skews at Common Transition Edges: (Un-Buffered Mode)
GROUP
SYMBOL
CONDITIONS
3V66
3V66 3V66 pin to pin skew
PCI
PCI PCI_F and PCI pin to pin skew
3V66 to PCI
S_3V66-PCI 3V66 leads 33MHz PCI
1_{Guaranteed by design, not 100% tested in production.}
MIN TYP MAX UNITS
0 155 500 ps
0 302 500 ps
1.5 1.7 3.5 ns
PD# Functionality
CPU_STOP# CPUT
1
Normal
0
iref * Mult
CPUC
Normal
Float
3V66
66MHz
Low
66MHz_OUT
PCICLK_F
PCICLK
PCICLK
USB/DOT
48MHz
66MHz_IN 66MHz_IN 66MHz_IN 48MHz
Low
Low
Low
Low
0465E—05/17/05
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