ICS952802 Datasheet, PDF (7/19 Pages) Integrated Circuit Systems – Programmable Timing Control Hu for P4 processor

Integrated
Circuit
Systems, Inc.
ICS952802
Advance Information
I²C Table: Frequency Select Register
Byte 4
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
FS3
FS2
FS1
FS0
FS Source
FS4
SS_EN
Outputs
Control
Function
Freq Select Bit 3
Freq Select Bit 2
Freq Select Bit 1
Freq Select Bit 0
Frequency HW/IIC
Select
Freq Select Bit 4
Spread Enable
Output Control
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
See Table1: Frequency
Selection Table
Latch Input
IIC
See Table1
OFF
ON
Running
Tri-state
PWD
0
0
0
0
0
0
1
0
I²C Table: Read Back Register
Byte 5
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
SEL12_48#RB
SEL24_48#RB
WDHRB
FS4RB
FS3RB
FS2RB
FS1RB
FS0RB
Control
Function
SEL Read Back
SEL Read Back
WD Hard Alarm Status
Read back
FS4 Read back
FS3 Read back
FS2 Read back
FS1 Read back
FS0 Read back
Type
R
R
R
R
R
R
R
R
0
48MHz
48MHz
Normal
-
-
-
-
-
1
12MHz
24MHz
Alarm
-
-
-
-
-
PWD
X
X
X
X
X
X
X
X
I²C Table: Output Control Register
Byte 6
Pin #
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
10
9
14
13
42/41
46/45
42/41
46/45
ZCLK_1
ZCLK_0
PCICLK_F1
PCICLK_F0
CPUCLK8T0/C0
CPUCLK8T1/C1
CPUCLK8T0/C0
CPUCLK8T1/C1
Control
Function
Output Control
Output Control
PCI_STOP# Control
PCI_STOP# Control
CPU_STOP# Control
CPU_STOP# Control
Output Control
Output Control
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
Disable
Enable
Disable
Enable
Stop Disable Stop Enable
Stop Disable Stop Enable
Stop Disable Stop Enable
Stop Disable Stop Enable
Disable
Enable
Disable
Enable
PWD
1
1
0
0
1
1
1
1
I²C Table: Output Control Register
Byte 7
Pin #
Name
Bit 7
14
Bit 6
13
Bit 5
22
Bit 4
21
Bit 3
20
Bit 2
19
Bit 1
18
Bit 0
17
PCICLK_F1
PCICLK_F0
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
0731—09/18/02
Control
Function
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
7
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
PWD
1
1
1
1
1
1
1
1