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ICS527-04 Datasheet, PDF (7/9 Pages) Integrated Circuit Systems – Clock Slicer User Configurable PECL input Zero Delay Buffer
ICS527-04
Clock Slicer User Configurable PECL input Zero Delay Buffer
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature 0 to +70°C
Parameter
Symbol
Conditions
Min. Typ.
Operating Voltage
VDD
3.15
3.3
Input High Voltage
VIH
2
Input Low Voltage
VIL
Peak to Peak Input
Voltage
Pins 7, 8, 10, 11
0.3
Common Mode Range
Pins 7, 8, 10, 11
VDD-1.4
Output High Voltage
Output Low Voltage
Operating Supply
Current
VOH IOH = -12 mA
VOL IOL = 12 mA
IDD 15 MHz in, 60 MHz
out, no load
2.4
8
Input Capacitance
CIN
4
On-chip pull-up resistor
RPU configuration inputs
270
Max.
3.45
0.8
1
Units
V
V
V
V
VDD-0.6 V
V
0.4
V
mA
pF
kΩ
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature 0 to +70° C
Parameter
Symbol
Conditions
Min.
Input Frequency
Output Frequency, CLK1
Output Duty Cycle
Absolute Clock Period Jitter
One sigma Clock Period Jitter
Input to output skew
FIN
FOUT
tOD
tja
tjs
tIO
0 to +70°C
Deviation from mean
PECLIN to PECLO,
Note 1
1.5
4
45
-250
Device to device skew
tpi
Common CLKIN,
measured at FBPECL
Typ.
50
± 90
40
Note 1: Assumes clocks with same rise time, measured from rising edges at VDD/2.
Max.
200
160
55
250
500
Units
MHz
MHz
%
ps
ps
ps
ps
Thermal Characteristics
Parameter
Symbol Conditions
Thermal Resistance Junction to
Ambient
θJA Still air
θJA 1 m/s air flow
θJA 3 m/s air flow
Thermal Resistance Junction to Case θJC
Min.
Typ.
100
80
67
60
Max.
Units
°C/W
°C/W
°C/W
°C/W
MDS 527-04 D
7
Revision 122804
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