ICS87993I Datasheet, PDF (6/16 Pages) Integrated Circuit Systems – 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL PLL CLOCK DRIVER W/DYNAMIC CLOCK SWITCH

Integrated
Circuit
Systems, Inc.
ICS87993I
1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL
PLL CLOCK DRIVER W/DYNAMIC CLOCK SWITCH
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS87993I provides sepa-
rate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V and V should
CC
CCA
be individually connected to the power supply plane through
vias, and bypass capacitors should be used for each pin. To
achieve optimum jitter performance, power supply isolation is
required. Figure 1 illustrates how a 10Ω resistor along with a
10µF and a .01µF bypass capacitor should be connected to
each V pin.
CCA
V_CC
V
CCA
3.3V
.01µF 10 Ω
.01µF
10 µF
FIGURE 1. POWER SUPPLY FILTERING
TERMINATION FOR LVPECL OUTPUTS
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminat-
ing resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
drive 50Ω transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion. Figures 2A and 2B show two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
F_OUT
Z
o
=
50Ω
Z_o = 50Ω
50Ω
1
RTT =
Z_o
(V + V / V –2) –2
OH
OL CC
F_IN
50Ω
RTT
V_CC - 2V
F_OUT
5
2 ^Zo
Z_o = 50Ω
3.3V
5
2 ^Zo
F
IN
Z_o = 50Ω
3
2 ^Zo
3
2 ^Zo
FIGURE 2A. LVPECL OUTPUT TERMINATION
FIGURE 2B. LVPECL OUTPUT TERMINATION
87993AYI
www.icst.com/products/hiperclocks.html
6
REV. B May 21, 2003