ICS9FG107 Datasheet, PDF (13/14 Pages) Integrated Circuit Systems – Programmable FTG for Differential CPU, PCI Express & SATA Clocks

Integrated
Circuit
Systems, Inc.
ICS9FG107
N
INDEX
AREA
12
D
e
b
c
E1 E
h x 45°
A
A1
-C-
SEATING
PLANE
.10 (.004) C
L
α
SYMBOL
A
A1
b
c
D
E
E1
e
h
L
N
α
In Millimeters
COMMON DIMENSIONS
MIN
MAX
2.41
2.80
0.20
0.40
0.20
0.34
0.13
0.25
SEE VARIATIONS
10.03
10.68
7.40
7.60
0.635 BASIC
0.38
0.64
0.50
1.02
SEE VARIATIONS
0°
8°
In Inches
COMMON DIMENSIONS
MIN
MAX
.095
.110
.008
.016
.008
.0135
.005
.010
SEE VARIATIONS
.395
.420
.291
.299
0.025 BASIC
.015
.025
.020
.040
SEE VARIATIONS
0°
8°
VARIATIONS
N
D mm.
MIN
MAX
48
15.75
16.00
Reference Doc.: JEDEC Publication 95, MO-118
10-0034
D (inch)
MIN
MAX
.620
.630
Ordering Information
ICS9FG107yFLFT
Example:
ICS XXXX y F Lx T
0863C—11/22/04
Designation for tape and reel packaging
Lead Option (optional)
LF = Lead Free
LN = Lead Free Annealed
Package Type
F = SSOP
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
13