ICS84330-03 Datasheet, PDF (13/20 Pages) Integrated Circuit Systems – 700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
ICS84330-03
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
JITTER REDUCTION FOR FREF_EXT SINGLE END INPUT
If the FREF_EXT input is driven by a 3.3V LVCMOS driver, the
jitter performance can be improved by reducing the amplitude
swing and slowing down the edge rate. Figure 6A shows an
amplitude reduction approach for a long trace. The swing will
be approximately 0.85V for logic low and 2.5V for logic high
(instead of 0V to 3.3V). Figure 6B shows amplitude reduction
approach for a short trace. The circuit shown in Figure 6C
reduces amplitude swing and also slows down the edge rate
by increasing the resistor value.
VDD
Ro ~ 7 Ohm RS
43
Driver_LVCMOS
Zo = 50 Ohm
Td
VDD
R1
100
R2
100
VDD
GND
TEST_CLK
FREF_EXT
FIGURE 6A. AMPLITUDE REDUCTION FOR A LONG TRACE
VDD
Ro ~ 7 Ohm RS
100
Driver_LVCMOS
VDD
R1
200
R2
200
VDD
GND
TEST_CLK
FREF_EXT
FIGURE 6B. AMPLITUDE REDUCTION FOR A SHORT TRACE
VDD
Ro ~ 7 Ohm RS
200
Driver_LVCMOS
VDD
R1
400
R2
400
VDD
GND
TEST_CLK
FREF_EXT
84330AY-03
FIGURE 6C. EDGE RATE REDUCTION BY INCREASING THE RESISTOR VALUE
www.icst.com/products/hiperclocks.html
13
REV. A FEBRUARY 2, 2006