ICS84330-03 Datasheet, PDF (1/20 Pages) Integrated Circuit Systems – 700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
ICS84330-03
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS84330-03 is a general purpose, dual
ICS
output high frequency synthesizer and a mem-
HiPerClockS™ _{ber of the HiPerClockS™ family of High Perfor-}
mance Clock Solutions from ICS. The VCO
operates at a frequency range of 250MHz to
700MHz. The VCO and output frequency can be pro-
grammed using the I²C interface. The output can be config-
ured to divide the VCO frequency by 1, 2, 3, 4, and 6.
Additionally, the device suppor ts spread spectrum clock-
ing (SSC) for minimizing Electromagnetic Interference
(EMI). The low cycle-cycle jitter and broad frequency
range of the ICS84330-03 make it an ideal clock gen-
erator for a variety of demanding applications which
require high performance.
BLOCK DIAGRAM
FEATURES
• Fully integrated PLL, no external loop filter requirements
• Two differential 3.3V LVPECL output
• Crystal oscillator interface: 10MHz to 25MHz
• Output frequency range: 41.67MHz to 700MHz
• VCO range: 250MHz to 700MHz
• Parallel or I²C interface for programming M and N dividers
during power-up
• Supports Spread Spectrum Clocking (SSC)
Center spread: selectable ±0.5%, ±1.0%, ±1.5%, ±2%
Up/Down spread: selectable 0.5%, 1.0%, 1.5%, 2%,
2.5%, 3%, 3.5%, 4%
• RMS Period jitter: 9ps (maximum)
• Cycle-to-cycle jitter: 40ps (maximum)
• 3.3V supply voltage
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
• Available in both standard and lead-free RoHS-compliant
packages
PIN ASSIGNMENT
OE ^Pullup
VCO_SEL ^Pullup
XTAL_IN
XTAL_OUT
OSC
1
FREF_EXT ^Pulldown
0
÷16
XTAL_SEL ^Pullup
PLL
Phase Detector
0
VCO
÷M
÷2
1
÷1 1
÷2 ₀
SCL
SDA
ADDR_SEL
VCCA
VCCA
FREF_EXT
XTAL_SEL
XTAL_IN
32 31 30 29 28 27 26 25
1
24
2
23
3 ICS84330-03 22
4 ^{32-Lead LQFP} 21
Y package
5 _{7mm x 7mm x 1.4mm} 20
6
body package ¹⁹
7
Top View
18
8
17
9 10 11 12 13 14 15 16
VCO_SEL
N1
N0
M8
M7
M6
M5
M4
Q0
nQ0
ADDR_SEL ^Pulldown
SDA
SCL
nP_LOAD ^Pullup
÷2
÷3
1
Q1
÷4
nQ1
÷6 ⁰
I²C Parallel Interface
M0:M8 ^{M0:M7 = Pulldown, M8 = Pullup}
N0 ^Pulldown
N1 ^Pulldown
84330AY-03
www.icst.com/products/hiperclocks.html
1
REV. A FEBRUARY 2, 2006