ICS950402 Datasheet, PDF (12/19 Pages) Integrated Circuit Systems – AMD - K8 System Clock Chip

ICS950402
Table 4: Asynchronous Fix PLL Frequency Select Table
controlled by Byte 21 bits (1:0)
Byte 21 Byte 21
VCO
HTT
HTT
PCI
PCI
48
48
REF
Bit 1
Bit 0
FREQ
DIV
FREQ
DIV
FREQ
DIV FREQ FREQ
0
0
528
8
66
8
33
11
48
14.318
0
1
Main PLL
X Main PLL
X Main PLL X
48
14.318
1
0
528
7
74.4286
7
37.7143 11
48
14.318
1
1
Main PLL
X Main PLL
X Main PLL X
48
14.318
I²C Table: Drive Strength Control Register
Byte 22
Pin #
Name
Bit 7
-
PCI10/HTT3 DrCntrl
Bit 6
-
PCI6Drv
Bit 5
-
PCI3Drv
Bit 4
-
PCI2Drv
Bit 3
-
PCIFDrv
Bit 2
-
Bit 1
-
Bit 0
-
24_48Drv
Reserved
Reserved
Control
Function
PCICLK10/HTTCLK3
Drive Strength Control
PCICLK6 Drive Strength
Control
PCICLK3 Drive Strength
Control
PCICLK2 Drive Strength
Control
PCICLK_F Drive
Strength Control
24_48MHz Drive
Strength Control
Reserved
Reserved
I²C Table: Slew Rate Control Register
Byte 23
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Reserved
Reserved
SDRSlw1
SDRSlw0
PCISlw1
PCISlw0
PCISlw1
PCISlw0
Control
Function
Reserved
Reserved
PCICLK(9:7)/HTTCLK
(2:0) Slew Rate Control
PCICLK(3:0) Slew Rate
Control
PCICLK(11,8, 6:4) Slew
Rate Control
I²C Table: Slew Rate Control Register
Byte 24
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
REFSlw1
REFSlw0
48MSlw1
48MSlw0
48MSlw1
48MSlw0
Reserved
Reserved
Control
Function
REF(2:0) Slew Rate
Control
48MHz Slew Rate
Control
24_48MHz Slew Rate
Control
Reserved
Reserved
Type
RW
RW
RW
RW
RW
RW
RW
RW
Type
RW
RW
RW
RW
RW
RW
RW
RW
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1X
1X
1.2X
1.2X
1X
1X
-
-
0
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
1
2X
2X
2.3X
2.3X
2X
2X
-
-
PWD
1
1
1
1
1
1
1
1
1
PWD
-
X
-
X
-
1
-
0
-
1
-
0
-
1
-
0
1
PWD
-
1
-
0
-
1
-
0
-
1
-
0
-
1
-
1
0700B—04/30/04
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