IS61NW6432 Datasheet, PDF (6/14 Pages) Integrated Circuit Solution Inc – 64K x 32 SYNCHRONOUS STATIC RAM WITH NO-WAIT STATE BUS FEATURE

IS61NW6432
READ OPERATION
Cycle Address R/W ADV/LD CEX CEN BWX OE I/O Comments
n
A0
H
L
L
X
X
X
X Address and Control meet setup
n+1
X
X
X
L
L
X
X
X Clock Setup valid
n+2
X
X
X
X
X
X
L
D0 Contents of Address A0 Read Out
BURST READ OPERATION
Cycle Address R/W ADV/LD
n
A0 H
L
n+1
X
X
H
n+2
X
X
H
n+3
X
X
H
n+4
X
X
H
n+5
A1 H
L
n+6
X
X
H
n+7
X
X
H
n+8
A2 H
L
CEX
L
X
X
X
X
L
X
X
L
CEN
X
L
L
L
L
L
L
L
L
BWX
X
X
X
X
X
X
X
X
X
OE I/O Comments
X
X Address and Control meet setup
X
X Clock Setup valid, Advance Counter
L
D0 Address A0 Read Out, Inc. Count
L D0+1 Address A0+1 Read Out, Inc. Count
L D0+2 Address A0+2 Read Out, Inc. Count
L D0+3 Address A0+3 Read Out, Load A1
L
D0 Address A0 Read Out, Inc. Count
L
D1 Address A1 Read Out, Inc. Count
L D0+1 Address A0+1 Read Out, Load A2
WRITE OPERATION
Cycle Address R/W ADV/LD CEX CEN BWX OE I/O Comments
n
A0
L
L
L
L
L
X
X Address and Control meet setup
n+1
X
X
X
L
L
X
X
X Clock Setup valid
n+2
X
X
X
X
L
X
X
D0 Write D0 to Address A0
BURST WRITE OPERATION
Cycle Address R/W ADV/LD CEX
n
A0
H
L
L
n+1
X
X
H
X
n+2
X
X
H
X
n+3
X
H
H
L
n+4
X
X
H
X
n+5
A1
L
L
L
n+6
X
X
H
X
n+7
X
X
H
X
n+8
A2
L
L
L
CEN
L
L
L
L
L
L
L
L
L
BWX
L
L
L
X
L
L
L
L
L
OE I/O Comments
X
X Address and Control meet setup
X
X Clock Setup valid, Inc. Count
X
D0 Address A0 Write Out, Inc. Count
L D0+1 Address A0+1 Write Out, Inc. Count
X D0+2 Address A0+2 Write Out, Inc. Count
X D0+3 Address A0+3 Write Out, Load A1
X
D0 Address A0 Write Out, Inc. Count
X
D1 Address A1 Write Out, Inc. Count
X D0+1 Address A0+1 Write Out, Load A2
Notes:
1. H=High; L=Low; X=Don't Care;?=Don't Know; Z=High lmpedance
6
Integrated Circuit Solution Inc.
SSR006-0B