IC-HT Datasheet, PDF (35/42 Pages) IC-Haus GmbH – DUAL CW LASER DIODE DRIVER

iC-HT
DUAL CW LASER DIODE DRIVER
REGISTER OVERVIEW
preliminary
Rev A1, Page 35/42
OVERVIEW
Addr
Bit 7
0x00 R CFGTIMO
0x01 R
0x02 R
0x03 R
0x04 R
0x05 R
0x06 R
0x07 R
...
0x0F R
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
SOSCERR
0x1E
0x1F
0x20
...
0x30
0x31
...
0x3F
Bit 6
OSCERR
LDKSAT2
Bit 5
OVC1
MONC2
Bit 4
Bit 3
OVC2
OVT
MAPC2
TEMP(7:0)
Bit 2
MEMERR
LDKSAT1
ADC1(7:0)
ADCC1(2:0)
ADCC2(2:0)
ADSNF2
MERGE
SOVC2
ADC2(7:0)
Not implemented
Not implemented
Chip revision mark
EOC1
DISC1
DISP1
ILIM1(7:0)
RMD1(7:0)
COMP1(2:0)
RLDKS1(1:0)
REF1(7:0)
EOC2
DISC2
DISP2
ILIM2(7:0)
RMD2(7:0)
COMP2(2:0)
RLDKS2(1:0)
REF2(7:0)
RACC2
ADSNF1
RDCO(5:0)
Not implemented
SOVC1
SOVT
MLDKSAT2 MLDKSAT1
Reserved register. Set to zero
Reserved register(Factory test). Set to zero
Not implemented
Not implemented
Validation content for 0x10, inverted
Validation content for 0x11, inverted
...
Validation content for 0x1F, inverted
Bit 1
PDOVDD
MONC1
Bit 0
INITRAM
MAPC1
ADC1(9:8)
ADC2(9:8)
ECIE1
EACC1
REF1(9:8)
ECIE2
EACC2
REF2(9:8)
RACC1
MODE(1:0)
MMONC MOSCERR
Table 67: Register layout