IC-HT Datasheet, PDF (18/42 Pages) IC-Haus GmbH – DUAL CW LASER DIODE DRIVER

iC-HT
DUAL CW LASER DIODE DRIVER
preliminary
Rev A1, Page 18/42
RLDKS2
00
01
10
11
Addr. 0x18; bit 3:2
R/W 00
V(LDK2) < 0.5 V sets the LDKSAT2 alarm bit
V(LDK2) < 0.8 V sets the LDKSAT2 alarm bit
V(LDK2) < 1.0 V sets the LDKSAT2 alarm bit
V(LDK2) < 1.2 V sets the LDKSAT2 alarm bit
MLDKSAT2
Addr. 0x1D; bit 3
R/W 1
0
LDKSAT2 event will be signaled at NCHK
1
LDKSAT2 event will not be signaled at NCHK
Table 40: LDK saturation mask channel 2
Table 38: LDK saturation threshold selection channel
2
If the LDKx voltage falls below the LDK saturation
threshold the LDKSATx error bit in STATUS1 register
will be set and it will be signaled through output pin
NCHK. Setting the mask register bit MLDKSATx to 1
suppresses the signaling at NCHK.
MLDKSAT1
Addr. 0x1D; bit 2
R/W 1
0
LDKSAT1 event will be signaled at NCHK
1
LDKSAT1 event will not be signaled at NCHK
Table 39: LDK saturation mask channel 1
Laser channel enabling and error handling
With pin INS/WKR or EMC unconnected, a corre-
sponding error signal will be generated (INSOPEN,
EMCOPEN). Any of these error signals will disable the
laser channels.
Setting DISC1 and DISC2 to 1(default) disables the
corresponding channel.
The errors in STATUS0 and STATUS1 registers disable
the laser channels. Every change in the STATUS reg-
isters is signaled at pin NCHK, unless the error event
is masked by the corresponding error mask bit.
Register Address Bits Default Description
INITRAM 0x00
0 R/O RAM initialized.
PDOVDD 0x00
1 R/O Power down event at VDD
MEMERR 0x00
2 R/O RAM memory validation error
OVT
0x00
3 R/O Overtemperature event
OVC2
0x00
4 R/O Overcurrent at channel 2
OVC1
0x00
5 R/O Overcurrent at channel 1
OSCERR 0x00
6 R/O Oscillator error (watchdog set)
CFGTIMO 0x00
7 R/O Configuration mode timeout event
MAPC1
0x01
0 R/O Channel 1 current state
MONC1
0x01
1 R/O Monitor channel 1 enabled at least once (latched)
LDKSAT1 0x01
2 R/O Channel 1 LDK saturation event
MAPC2
0x01
4 R/O Channel 2 current state
MONC2
0x01
5 R/O Monitor channel 2 enabled at least once (latched)
LDKSAT2 0x01
6 R/O Channel 2 LDK saturation event
Table 41: Status registers overview
In order to enable the channels, the error events must
be acknowledged. Acknowledging an error is accom-
plished by reading the STATUS register. After a power-
on PDVDD and INITRAM errors will be set, therefore
it is required to read STATUS0 and STATUS1 registers
after each power-on.
Exiting standby mode will not reset the RAM but will
set the PDOVDD status bit. Therefore STATUS0 must
be read once after each standby to re-enable the laser
channels.
In case of an overcurrent (OVC) or an overtemperature
(OVT) event, laser channels are disabled.
A memory error event and a configuration timeout er-
ror event will also disable the laser channels. More
information about the memory error on page 32. The
conditions to enable each laser channel are shown in
figure 7.