IC-NQL Datasheet, PDF (20/24 Pages) IC-Haus GmbH – 13-bit Sin/D CONVERTER WITH SSI INTERFACE

iC-NQL
13-bit Sin/D CONVERTER WITH SSI INTERFACE
Examples of SSI Data Output Formats
Rev B1, Page 20/24
Output Formats SSI
13-bit SSI
Res Mode Error CRC T1 T2 T3 T4... T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 T24 T25
10 bit SSI X
-
S9 S8 S7 S6 ... S0 E1 E0 0 Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop
Example
0000000000000
13 bit SSI -
-
S12 S11 S10 S9 ... S3 S2 S1 S0 Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop
*1
SSI-R -
*2
Example
000000000000
-
S12 S11 S10 S9 ... S3 S2 S1 S0 Stop S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2
25-bit SSI
13 bit SSI
8 + 13 SSI
bit^*3
Example
0
X
-
S12 S11 S10 S9 ... S3 S2 S1 S0 E1 E0 0
Example
0
X
-
P7 P6 P5 P4 ... P0, S10 S9 S8 S7 S6 S5
S12, S11
Example
Configuration M2S = 0x00, CFGSSI = 0x00, unless otherwise noted.
*1) CFGSSI = 0x01; *2) CFGSSI = 0x03; *3) M2S = 0x01
Legend SSI = SSI Protocol
SSI-R = SSI Ring Register operation
Stop Stop Stop Stop Stop Stop Stop Stop Stop
000000000
S4 S3 S2 S1 S0 E1 E0 0 Stop
00
Table 35: Output Formats SSI
Cycle
CLK
DATA
Latch
P7
MSB
P0 S12
LSB MSB
S0 Stop P7
LSB
MSB
P0 S12
LSB MSB
S0 Stop
LSB
Timeout
Figure 16: 25-bit SSI output format during ring register operation. The example displays the transmission
of a 13-bit angle value headed by period counter data of 8-bit; error messages are switched off
herein (SELRES = 0x03, M2S = 0x01, CFGSSI = 0x03)
EEPROM INTERFACE
Serial EEPROM components permitting operation
from 3.3 V to 5 V can be connected (such as 24C02, for
example). When the device is switched on the memory
area of bytes 0 to 15 is mapped onto iC-NQL’s regis-
ters.