IC-GF Datasheet, PDF (20/26 Pages) IC-Haus GmbH – TRANSCEIVER

iC-GF
TRANSCEIVER
V(QX)
Vtx(CFI)lo
A
tdnscr max
tdscr(MIN)
tdscr(MAX)
tdnscr min
BCB
A
T
V(NDIAG)
Figure 11: Communication request timing:
A: Communication request ignored
B: Uncertainty range
C: Communication request acknowl-
edged
Rev C1, Page 20/26
Sensor Communication request SCR
OUTD(1:0) QCFG1(1:0) CFI (70...90 µs pulse)
x0
11
High
x1
11
Low
x0
10
High
x1
10
Low
x0
01
Low
x1
01
High
Table 26: Communication request at channel 1,
OEN = 1, SCR2 = 0, ENSCR = 1, INVx = 0
SPI INTERFACE
The SPI interface uses the pins NCS, SCLK, MISO and
MOSI. The protocol is shown in Figures 12 and 13. A
communication frame consists of one addressing byte
and one data byte. Bit 7 of the address byte is used
for selecting a read (set to 1) or a write (set to 0) oper-
ation. The other bits are used for register addressing.
It is possible to transmit several bytes consecutively,
if the NCS signal is not reset and SCLK keeps clock-
ing. The address is internally incremented after each
transmitted byte. Once the address has reaches the
last register (0x04), the following 3 increments will read
and write dummy data. After that addressing will start
again at 0x00. The required timing for the SPI signals
during a communication is shown in Figure 1.
NCS
SCLK
MOSI
MISO
ADR(6:0)
Polarity 0, Phase 0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
X
High Impedance
Figure 12: SPI write data
NCS
SCLK
MOSI
MISO
ADDRESS(6:0)
High Impedance
Polarity 0, Phase 0
don't care
n
n-1
n-2
n-3
n-4
n-5
Figure 13: SPI read data
5
4
3
2
1
0
X High Impedance