IC-PR Datasheet, PDF (10/18 Pages) IC-Haus GmbH – REFLECTIVE OPTO ENCODERS

iC-PR Series
REFLECTIVE OPTO ENCODERS
VOLTAGE DOMAINS
VCC-DOMAIN
VCC
TMO TM1 TM2
+
-
VZ
Sensors & Signal Conditioning
PA
SEL1
SEL2
VCC
NA
+
TZ
-
PB
EDC
NB
GNDA
Mode Control
VDD-DOMAIN
VDD
Analog Output
PZ
Drivers
NZ
GNDD
Logic
Digital Output
Drivers
Figure 6: Analog and digital voltage domains
Rev A3, Page 10/18
In iC-PR, the analog and the digital supply voltages
are applied at different pins. On the one hand, this
improves the quality of the analog signals, on the other
hand, the digital signal output levels can be chosen
to match subsequent circuitry. The internal voltage
domains are shown in Fig. 6.
Please note:
• Permissible voltage ranges for VCC, VDD spec-
ified in Electrical Characteristics, parameters
No. 001 and No. 003, respectively
• VDD ≤ VCC
• reference voltage / high level for mode pins is
VCC
• GNDA and GNDD must be at the same potential
but should be connected with separate lines from
a star point on the PCB
OPERATION MODES
The iC-PR series features 8 principle operation modes,
which are selectable by the voltages applied to the pins
SEL1 and SEL2, as summarized in Table 4.
These tri-level inputs might be connected to a voltage
below Vt()lo (low, see 601), a voltage above Vt()hi (high,
see 602) or a voltage between the specified values of
Vt()mid (open, see 603). For other voltages the function
is undefined.
The open configuration can be easily obtained by an ex-
ternal voltage divider. Alternatively, when the pin is left
unconnected, the iC itself biases the input at 50% VCC
(see 604).
Note: Static pin voltages at SEL1 and SEL2 are re-
quired during operation. If changing the setting of SEL1
and SEL2 pins during operation, power-on reset of
iC-PR is required.
SEL1
low
high
low
high
high
open
open
open
SEL2
high
low
open
high
open
low
high
open
Mode
DX1
DX2
DX4
DX8
DX16
A250
AAMP
A500DZ
Description
digital A/B/Z (x1 interpolation)
digital A/B/Z (x2 interpolation)
digital A/B/Z (x4 interpolation)
digital A/B/Z (x8 interpolation)
digital A/B/Z (x16 interpolation)
analog COS/SIN (VREF ± 250 mV), analog Z, see Figure 7
analog COS/SIN (transimpedance amps. ± 250 mV), analog Z, see Figure 7
analog COS/SIN (VREF ± 500 mV), digital Z (ungated), see Figure 7
Table 4: Operation modes selectable by pins SEL1/2.