HY62UF16101C Datasheet, PDF (8/10 Pages) Hynix Semiconductor – 64Kx16bit full CMOS SRAM

HY62UF16101C Series
DATA RETENTION ELECTRIC CHARACTERISTIC
TA=0°C to 70°C / -40°C to 85°C (I)
Symbol
Parameter
VDR
Vcc for Data Retention
ICCDR Data Retention Current
tCDR
tR
Chip Deselect to Data
Retention Time
Operating Recovery Time
Test Condition
/CS > Vcc - 0.2V or
/UB = /LB > Vcc-0.2V,
VIN > Vcc - 0.2V or VIN < Vss + 0.2V
Vcc=1.5V, /CS > Vcc - 0.2V, LL
/UB = /LB > Vcc-0.2V,
VIN > Vcc - 0.2V or
SL
VIN < Vss + 0.2V
See Data Retention Timing
Diagram
Notes:
1. Typical values are under the condition of TA = 25°C.
2. tRC is read cycle time.
Min Typ Max Unit
1.2
-
3.3
V
-
0.5
2
uA
-
-
1
uA
0
-
-
ns
tRC(2)
-
-
ns
DATA RETENTION TIMING DIAGRAM
VCC
2.7V
DATA RETENTION MODE
tCDR
tR
VDR
CS
or /UB &/LB
VSS
CS > VCC-0.2V
or /UB = /LB > Vcc – 0.2V
Rev.04 /Dec. 00
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