HY62UF16101C Datasheet, PDF (5/10 Pages) Hynix Semiconductor – 64Kx16bit full CMOS SRAM

HY62UF16101C Series
AC CHARACTERISTICS
Vcc = 2.7~3.3V, TA = 0°C to 70°C / -40°C to 85°C (I), unless otherwise specified
# _Symbol
Parameter
-55
-70
-85
-10
Min Max Min Max Min Max Min Max ^Unit
READ CYCLE
1 tRC Read Cycle Time
55 - 70 - 85 - 100 - ns
2 tAA
Address Access Time
- 55 - 70 - 85 - 100 ns
3 tACS Chip Select Access Time
- 55 - 70 - 85 - 100 ns
4 tOE Output Enable to Output Valid
- 35 - 40 - 45 - 50 ns
5 tBA
/LB, /UB Access Time
- 55 - 70 - 85 - 100 ns
6 tCLZ Chip Select to Output in Low Z
10 - 10 - 10 - 20 - ns
7 tOLZ Output Enable to Output in Low Z
5 - 5 - 5 - 5 - ns
8 tBLZ /LB, /UB Enable to Output in Low Z
5 - 5 - 5 - 10 - ns
9 tCHZ Chip Deselection to Output in High Z 0 30 0 30 0 30 0 30 ns
10 tOHZ Out Disable to Output in High Z
0 30 0 30 0 30 0 30 ns
11 tBHZ /LB, /UB Disable to Output in High Z 0 30 0 30 0 30 0 30 ns
12 tOH
Output Hold from Address Change
10 - 10 - 10 - 15 - ns
WRITE CYCLE
13 tWC Write Cycle Time
55 - 70 - 85 - 100 - ns
14 tCW Chip Selection to End of Write
50 - 60 - 70 - 80 - ns
15 tAW Address Valid to End of Write
50 - 60 - 70 - 80 - ns
16 tBW /LB, /UB Valid to End of Write
50 - 60 - 70 - 80 - ns
17 tAS
Address Set-up Time
0 - 0 - 0 - 0 - ns
18 tWP Write Pulse Width
45 - 50 - 55 - 75 - ns
19 tWR Write Recovery Time
0 - 0 - 0 - 0 - ns
20 tWHZ Write to Output in High Z
0 20 0 25 0 30 0 35 ns
21 tDW Data to Write Time Overlap
25 - 30 - 35 - 45 - ns
22 tDH Data Hold from Write Time
0 - 0 - 0 - 0 - ns
23 tOW Output Active from End of Write
5 - 5 - 5 - 10 - ns
AC TEST CONDITIONS
TA = 0°C to 70°C / -40°C to 85°C (I), unless otherwise specified
Parameter
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Level
Output Load tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW
Others
Value
0.4V to 2.2V
5ns
1.5V
CL = 5pF + 1TTL Load
CL = 30pF + 1TTL Load
AC TEST LOADS
VTM=2.8V
DOUT
1029 Ohm
CL(1)
1728 Ohm
Note
1. Including jig and scope capacitance
Rev.04 /Dec. 00
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