HY5V66EF6 Datasheet, PDF (8/12 Pages) Hynix Semiconductor – 64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O

11Preliminary
Synchronous DRAM Memory 64Mbit (4Mx16bit)
HY5V66E(L)F6(P) Series
DC CHARACTERISTICS II (TA= 0 to 70^oC)
Parameter
Symbol
Test Condition
Speed
Unit Note
5 6 7HP
Operating Current
IDD1
Burst length=1, One bank active
tRC ≥ tRC(min), IOL=0mA
120 110
100
mA 1
Precharge Standby Current ^IDD2P
in Power Down Mode
IDD2PS
CKE ≤ VIL(max), tCK = 15ns
CKE ≤ VIL(max), tCK = ∞
2
mA
2
mA
CKE ≥ VIH(min), CS ≥ VIH(min), tCK
= 15ns
IDD2N Input signals are changed one time
18
Precharge Standby Current
in Non Power Down Mode
during 2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
mA
IDD2NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
18
Active Standby Current
in Power Down Mode
IDD3P
IDD3PS
CKE ≤ VIL(max), tCK = 15ns
CKE ≤ VIL(max), tCK = ∞
3
mA
3
CKE ≥ VIH(min), CS ≥ VIH(min), tCK
= 15ns
IDD3N Input signals are changed one time
40
Active Standby Current
in Non Power Down Mode
during 2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
mA
IDD3NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
35
Burst Mode Operating Cur-
rent
IDD4
tCK ≥ tCK(min), IOL=0mA
All banks active
120 110
100
mA 1
Auto Refresh Current
IDD5
tRC ≥ tRC(min), All banks active
210 195
180
mA 2
Self Refresh Current
IDD6
CKE ≤ 0.2V
Normal
1
Low power
400
mA
3
uA
Note :
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2. Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II
3. HY5V66EF6(P) Series : Normal Power / HY5V66ELF6(P) Series : Low Power
Rev. 0.2 / June. 2005
8