GMS81C2020 Datasheet, PDF (78/92 Pages) Hynix Semiconductor – CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver

GMS81C2020/GMS81C2120
Hyundai Micro Electro nics
Oscillator
(XI pin)
Internal
Clock
RESETB
Internal
RESETB
STOP Mode
STOP Instruction Execution
Time can not be control by software
Stabilization Time
t_ST = 64mS @4MHz
Figure 21-5 Timing of STOP Mode Release by RESET
21.3 Wake-up Timer Mode
In the Wake-up Timer mode, the on-chip oscillator is not
stopped. Except the Prescaler( only 2048 devided ratio )
and Timer0, all functions are stopped, but the on-chip
RAM and Control registers are held. The port pins out the
values held by their respective port data register, port di-
rection registers.
The Wake-up Timer mode is activated by execution of
STOP instruction after setting the bit WAKEUP of
CKCTLR to “1”. ( This register should be written by
byte opereation. If this register is set by bit manipula-
tion instrunction, for example "set1" or "clr1" instruc-
tion, it may be undesired operation )
Note: After STOP instruction, at least two or more NOP in-
struction should be written
Ex)
LDM TDR0,#0FFH
LDM TM0,#0001_1011B
LDM CKCTLR,#0100_1110B
STOP
NOP
NOP
In addition, the clock source of timer0 should be selected
to 2048 devided ratio. Otherwise, the wake-up function
can not work. And the timer0 can be operated as 16-bit tim-
er with timer1. ( refer to timer function )The period of
wake-up function is varied by setting the timer data regis-
ter 0, TDR0.
Release the Wake-up Timer mode
The exit from Wake-up Timer mode is hardware reset,
Timer0 overflow or external interrupt. Reset re-defines all
the Control registers but does not change the on-chip
RAM. External interrupts and Timer0 overflow allow both
on-chip RAM and Control registers to retain their values.
If I-flag = 1, the normal interrupt response takes place. If I-
flag = 0, the chip will resume execution starting with the
instruction following the STOP instruction. It will not vec-
tor to interrupt service routine.( refer to Figure 21-1 )
When exit from Wake-up Timer mode by external inter-
rupt or timer0 overflow, the oscillation stabilization time is
not required to normal operation. Because this mode do not
stop the on-chip oscillator shown as Figure 21-6 .
Oscillator
(XI pin)
CPU
Clock
Interrupt
Request
STOP Instruction
Execution
Normal Operation
Wake-up Timer Mode
( stop the CPU clock )
Normal Operation
Do not need Stabilization Time
78
preliminary
Nov. 1999 Ver 0.0