GMS81C2020 Datasheet, PDF (69/92 Pages) Hynix Semiconductor – CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver

Hyundai Micro Electronics
GMS81C2020/GMS81C2120
The following method is used to save/restore the general-
purpose registers.
Example: Register save using push and pop instructions
INTxx: PUSH A
PUSH X
PUSH Y
interrupt processing
POP
Y
POP
X
POP
A
RETI
;SAVE ACC.
;SAVE X REG.
;SAVE Y REG.
;RESTORE Y REG.
;RESTORE X REG.
;RESTORE ACC.
;RETURN
General-purpose register save/restore using push and pop
instructions;
main task
acceptance of
interrupt
interrupt
service task
saving
registers
interrupt return
restoring
registers
19.2 BRK Interrupt
Software interrupt can be invoked by BRK instruction,
which has the lowest priority order.
Interrupt vector address of BRK is shared with the vector
of TCALL 0 (Refer to Program Memory Section). When
BRK interrupt is generated, B-flag of PSW is set to distin-
guish BRK from TCALL 0.
Each processing step is determined by B-flag as shown in
Figure 19-4 .
BRK or
TCALL0
B-FLAG
=1
BRK
INTERRUPT
ROUTINE
=0
TCALL0
ROUTINE
RETI
RET
19.3 Multi Interrupt
If two requests of different priority levels are received si-
multaneously, the request of higher priority level is ser-
viced. If requests of the interrupt are received at the same
time simultaneously, an internal polling sequence deter-
mines by hardware which request is serviced.
Figure 19-4 Execution of BRK/TCALL0
However, multiple processing through software for special
features is possible. Generally when an interrupt is accept-
ed, the I-flag is cleared to disable any further interrupt. But
as user sets I-flag in interrupt routine, some further inter-
rupt can be serviced even if certain interrupt is in progress.
Nov. 1999 Ver 0.0
preliminary
69