GMS81C2020 Datasheet, PDF (55/92 Pages) Hynix Semiconductor – CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver

Hyundai Micro Electronics
GMS81C2020/GMS81C2120
timer register T0 (T1) increases and matches TDR0
(TDR1).
This timer interrupt in capture mode is very useful when
the pulse width of captured signal is more wider than the
maximum period of Timer.
For example, in Figure 15-8 , the pulse width of captured
signal is wider than the timer data value (FF_H) over 2
times. When external interrupt is occured, the captured
value (13_H) is more little than wanted value. It can be ob-
tained correct value by counting the number of timer over-
flow occurence.
Timer/Counter still does the above, but with the added fea-
ture that a edge transition at external input INTx pin causes
the current value in the Timer x register (T0,T1), to be cap-
tured into registers CDRx (CDR0, CDR1), respectively.
After captured, Timer x register is cleared and restarts by
hardware.
It has three transition modes: "falling edge", "rising edge",
"both edge" which are selected by interrupt edge selection
register IEDS (Refer to External interrupt section). In ad-
dition, the transition at INTx pin generate an interrupt.
Note: The CDRx, TDRx and Tx are in same address. In
the capture mode, reading operation is read the
CDRx, not Tx because path is opened to the CDRx,
and TDRx is only for writing operation.
TM0
TM1
EC0
fXI
INT0
INT1
-
-
CAP0 T0CK2 T0CK1 T0CK0
-
-
1
X
X
X
POL
16BIT PWM1E CAP1 T1CK1 T1CK0
X
0
0
1
X
X
Edge Detector
T0CK[2:0]
T0CN
X
T0ST
X
T1CN T1ST
ADDRESS : D0H
RESET VALUE : --000000
ADDRESS : D2H
RESET VALUE : 00000000
X
X
T0ST
0 : Stop
1 : Clear and Start
÷2
÷4
÷8
÷ 32
÷ 128
÷ 512
÷ 2048
÷1
÷2
÷8
T0CK
1
MUX
T0 ( 8-bit )
CLEAR
CAPTURE
T0CN
COMPARATOR
T0IF
CDR0 ( 8-bit ) TDR0 ( 8-bit )
TIMER 0
INTERRUPT
MUX
IEDS[1:0]
1
INT0IF
T0ST
0 : Stop
1 : Clear and Start
INT 0
INTERRUPT
T1 ( 8-bit )
CLEAR
T1CK[1:0]
CAPTURE
T1CN
IEDS[3:2]
CDR1 ( 8-bit )
COMPARATOR
TDR1 ( 8-bit )
T1IF
TIMER 1
INTERRUPT
INT1IF
INT 1
INTERRUPT
Figure 15-6 8-bit Capture Mode
Nov. 1999 Ver 0.0
preliminary
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