HY51VS65163HG Datasheet, PDF (6/11 Pages) Hynix Semiconductor – 4M x 16Bit EDO DRAM

HY51V(S)65163HG/HGL
Parameter
/OE to Din delay time
/OE delay time from Din
/CAS delay time from Din
Transition time ( Rise and Fall)
Refresh period
Refresh period (L-version)
- continued -
Symbol
tODD
tDZO
tDZC
tT
tREF
-45
Min Max
12
-
0
-
0
-
2
50
-
64
-
128
-50
Min Max
13
-
0
-
0
-
2
50
-
64
-
128
-60
Min Max
15
-
0
-
0
-
2
50
-
64
-
128
Unit Note
ns
5
ns
6
ns
6
ns
7
ms 4K Ref.
ms 4K Ref.
Read Cycles
Parameter
Access time from /RAS
Access time from /CAS
Access time from column address
Access time from /OE
Read command set-up time
Read command hold time to /CAS
Read command hold time to /RAS
Column address to /RAS lead time
Column address to /CAS lead time
Output buffer turn off delay time from /CAS
Output buffer turn off delay time from /OE
/CAS to Din delay time
/RAS to Din delay time
/WE to Din delay time
Output buffer turn off delay time from /RAS
Output buffer turn off delay time from /WE
Output data hold time
Output data hold time from /RAS
Read command hold time from /RAS
Output data hold time from /OE
/CAS to output in low-Z
Symbol
tRAC
tCAC
tAA
tOAC
tRCS
tRCH
tRRH
tRAL
tCAL
tOFF
tOEZ
tCDD
tRDD
tWDD
tOFR
tWEZ
tOH
tOHR
tRCHR
tOHO
tCLZ
-45
Min Max
-
45
-
12
-
23
-
12
0
-
0
-
0
-
23
-
15
-
-
12
-
12
12
-
12
-
12
-
-
12
-
12
3
-
3
-
45
-
3
-
0
-
-50
Min Max
-
50
-
13
-
25
-
13
0
-
0
-
0
-
25
-
15
-
-
13
-
13
13
-
13
-
13
-
-
13
-
13
3
-
3
-
50
-
3
-
0
-
-60
Min Max
-
60
-
15
-
30
-
15
0
-
0
-
0
-
30
-
18
-
-
15
-
15
15
-
15
-
15
-
-
15
-
15
3
-
3
-
60
-
3
-
0
-
Unit Note
ns 8, 9
ns 9,10,17
ns 9,11,17
ns
9
ns 21
ns 12,22
ns 12
ns
ns
ns 13,26
ns 13
ns
5
ns
ns
ns 13,26
ns 13
ns 26
ns 26
ns
ns
ns
Rev.0.1/Apr.01
6