HY51VS65163HG Datasheet, PDF (2/11 Pages) Hynix Semiconductor – 4M x 16Bit EDO DRAM

PIN CONFIGURATION
HY51V(S)65163HG/HGL
VCC ₁
IO0 2
IO1 3
IO2 4
IO3 5
VCC 6
IO4 7
IO5 8
IO6 9
IO7 10
NC 11
VCC 12
/WE 13
/RAS 14
NC 15
NC 16
NC 17
NC 18
A0 19
A1 20
A2 21
A3 22
A4 23
A5 24
VCC 25
50 VSS
49 IO15
48 IO14
47 IO13
46 IO12
45 VSS
44 IO11
43 IO10
42 IO9
41 _IO8
40 NC
39 VSS
38 _/LCAS
37 /UCAS
36 /OE
35 NC
34 NC
33 NC
32 A11
31 A10
30 A9
29 A8
28 A7
27 A6
26 VSS
50 Pin Plastic SOJ / TSOP-II
PIN DESCRIPTION
Pin
/RAS
/UCAS, /LCAS
/WE
/OE
A0-A11
A0-A11
I/O 0- I/O15
Vcc
Vss
NC
Function
Row Address Strobe
Column Address Strobe
Write Enable
Output Enable
Address Inputs
Refresh Address Inputs
Data Input / Output
Power (3.3V)
Ground
No connection
Rev.0.1/Apr.01
2