HY5DU283222AQP Datasheet, PDF (51/51 Pages) Hynix Semiconductor – 128M(4Mx32) GDDR SDRAM

Write DM Operation
tCK
/CK
CK
CKE
tIH
tIS
tCH tCL
CMD
NOP
RA, CA
WRITE
tIS tIH
Col n
NOP
NOP
NOP
NOP
RA
AP
BA0,BA1
Case 1 :
tDQSS = min
DQS
DQ
DM
tIS tIH
DIS AP
tIS tIH
Bank x
tDQSS
tDQSH
tDSH
tWPST
tWPRES
tWPRE
DI
n
tDQSL
tDPL
HY5DU283222AQP
PRE
VALID
NOP
NOP
All Banks
One Bank
Bank x
tRP
ACT
RA
RA
RA
BA
Case 2 :
tDQSS = max
DQS
DQ
DM
tDQSS
tDSS
tDQSH
tWPRES
tWPRE
DI
n
tDQSL
tDSS
tWPST
DI n = Data in for column n
Burst length = 4 in the case shown
3 subsequent elements of Data In are applied in the programmed order following Data In
(the second element of the four is masked)
DIS AP = Enable Autoprecharge
* = * “ Don’t Care”, if AP is high at this point
PRE=Precharge, ACT=Active, RA=Row Address, BA=Bank Address
NOP commands are shown for ease of illustration; other valid commands may be possible at these times
Rev. 0.1 / Jan. 2005
Don’t care
51