HY5DU283222AQP Datasheet, PDF (50/51 Pages) Hynix Semiconductor – 128M(4Mx32) GDDR SDRAM

Bank Write Access
HY5DU283222AQP
/CK
CK
CKE
tIH
tIS
CMD
NOP
RA, CA
RA
AP
BA0,BA1
Case 1 :
tDQSS = min
DQS
DQ
DM
tCK
tCH tCL
ACT
tIS tIH
RA
RA
RA
tIS tIH
Bank x
NOP
NOP
WRITE
Col n
NOP
NOP
NOP
NOP
tRCD
tIS tIH
DIS AP
Bank x
tDQSS
tDQSH
tRAS
tDSH
tWPST
tWPRES
tWPRE
DI
n
tDQSL
tDPL
PRE
All Banks
One bank
Bank x
Case 2 :
tDQSS = max
DQS
DQ
DM
tDQSS
tDSS
tDQSH
tWPRES
tWPRE
DI
n
tDQSL
tDSS
tWPST
DI n = Data in for column n
Burst length = 4 in the case shown
3 subsequent elements of Data In are applied in the programmed order following Data In
DIS AP = Disable Autoprecharge
* = * “ Don’t Care”, if AP is high at this point
PRE=Precharge, ACT=Active, RA=Row Address
NOP commands are shown for ease of illustration; other valid commands may be possible at these times
Rev. 0.1 / Jan. 2005
Don’t care
50