HY5DU283222AQP Datasheet, PDF (43/51 Pages) Hynix Semiconductor – 128M(4Mx32) GDDR SDRAM

Auto Refresh Mode
HY5DU283222AQP
tCK
tCH
tCL
/CK
CK
CKE
tIS tIH
tIS tIH
VALID
VALID
COMMAND _NOP
PRE
NOP
NOP
AR
NOP
AR
NOP
NOP
ACT
ADDR
RA
ALL BANKS
AP
RA
ONE BANK
tIS tIH
BA0,BA1
*Bank(s)
BA
DQS
DQ
DM
tRP
tRFC
tRFC
Don’t Care
* = “ Don’t Care ”, if AP is High at this point ; AP must be High if more than one bank is active ( i.e., must precharge all active banks)
PRE = Precharge, ACT = Active, RA = Row Address, BA = Bank Address, AR = Autorefresh.
NOP commands are shown for ease of illustration ; other valid commands may be possible at these times.
DM, DQ and DQS signals are all “Don’t Care” / High-Z for operation shown.
Rev. 0.1 / Jan. 2005
43