HMT451U6MFR8C Datasheet, PDF (4/55 Pages) Hynix Semiconductor – DDR3 SDRAM Unbuffered DIMMs Based on 4Gb M-Die

Key Parameters
MT/s
DDR3-1066
DDR3-1333
DDR3-1600
DDR3-1866
Grade
-G7
-H9
-PB
-RD
tCK
(ns)
1.875
1.5
1.25
1.07
CAS
Latency
(tCK)
tRCD
(ns)
tRP
(ns)
tRAS
(ns)
tRC
(ns)
CL-tRCD-tRP
7
13.125 13.125 37.5 50.625
9
13.5
13.5
(13.125)* (13.125)*
36
49.5
(49.125)*
11
13.75 13.75
(13.125)* (13.125)*
35
48.75
(48.125)*
13
13.91 13.91
(13.125)* (13.125)*
34
47.91
(47.125)*
7-7-7
9-9-9
11-11-11
13-13-13
*SK hynix DRAM devices support optional downbinning to CL11, CL9 and CL7. SPD setting is programmed to match.
Speed Grade
Grade
-G7
-H9
-PB
-RD
CL6
CL7
800
1066
800
1066
800
1066
800
1066
Address Table
CL8
1066
1066
1066
1066
Frequency [MHz]
CL9
CL10
CL11
1333
1333
1333
1333
1333
1333
1600
1600
CL12
CL13
1866
Remark
Refresh Method
Row Address
Column Address
Bank Address
Page Size
4GB(1Rx8)
8K/64ms
A0-A15
A0-A9
BA0-BA2
1KB
8GB(2Rx8)
8K/64ms
A0-A15
A0-A9
BA0-BA2
1KB
8GB(2Rx8)
8K/64ms
A0-A15
A0-A9
BA0-BA2
1KB
Rev. 1.1 / Jul. 2013
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