HY5PS561621BLFPE3 Datasheet, PDF (21/34 Pages) Hynix Semiconductor – 256Mb DDR2 SDRAM

Parameter
Exit active power down to read command
Exit active power down to read command
(Slow exit, Lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE
asynchronously drops LOW
1
1HY5PS561621B(L)FP
-Continue-
Symbol
tXARD
DDR2-667
min
max
2
DDR2-800
min
max
2
Unit Note
tCK
1
tXARDS
7 - AL
8 - AL
tCK
1, 2
t_CKE
t_AOND
t_AON
t_AONPD
t_AOFD
t_AOF
t_AOFPD
tANPD
tAXPD
tOIT
tDelay
3
3
tCK
2
2
2
2
tCK
tAC(min)
tAC(max)
+0.7
tAC(min)
tAC(max)
+0.7
ns
tAC(min)+2
2tCK+
tAC(max)+1
tAC(min)
+2
2tCK+
tAC(max)+1
ns
2.5
2.5
2.5
2.5
tCK
tAC(min)
tAC(max)+
0.6
tAC(min)
tAC(max)
+0.6
ns
tAC(min)
+2
2.5tCK+
tAC(max)+1
tAC(min)
+2
2.5tCK+
tAC(max)+1
ns
3
3
tCK
8
8
tCK
0
12
0
12
ns
tIS+tCK+tIH
tIS+tCK
+tIH
ns
6,16
17
15
Rev. 0.2 / Apr. 2008
21